1. Field of the Invention
The present invention relates to a method for forming a semiconductor device, and more particularly, to a method for improving SiON residue oxide problem by forming a sidewall offset spacer.
2. Description of the Prior Art
As the semiconductor device, such as metal oxide semiconductor (MOS), becomes highly integrated, the area occupied by the device shrinks, as well as the design rule.
As the MOS devices are scaled down to about 0.18 micrometer or below, a SiON layer is usually deposited on the surface of a polygate, serving as an anti-reflective coating and critical dimension (CD) control. Unfortunately, the use of this SiON layer has some side effects on the formation of the MOS devices. For example, the surface of the SiON layer is apt to be oxidized. This surface oxide disadvantageously retards the following SiON removing by H.sub.3 PO.sub.4 etching. Further, the H.sub.3 PO.sub.4 etchant will attack the polygate, resulting in polysilicon peeling.
For the foregoing reasons, there is a need for a method of improving SiON residue oxide problem and the polysilicon peeling issue while forming a semiconductor device.